1. Field of the Invention
The present invention relates generally to integrated circuits, and more specifically to a method for forming contact vias in integrated circuits.
2. Description of the Prior Art
As integrated circuit devices become more complex, greater numbers of interconnect layers are required to connect the various sections of the device. Generally contact vias are formed between interconnect layers to connect one layer to another. When multiple layers of interconnect are used in this manner, difficulties arise in forming upper interconnect layers and contact vias due to the uneven topographical features caused by the lower interconnect layers. The uneven topographical features of multiple interconnect layers are caused by forming the various interconnect layers above each other, resulting in the creation of hills and valleys on the surface of the device. Thus, the topography of contact vias and interconnect layers affects the ease of manufacturing of the integrated circuit device.
Those skilled in the art will recognize it is difficult to get upper interconnect layers to maintain constant cross-sections when crossing over uneven topography. This leads to portions of the interconnect signal lines having a higher current density, leading to electromigration problems and related device failure mechanisms. Furthermore, step coverage problems can result in voids and other defects in the interconnect signal lines themselves, and in the contact vias formed between the interconnect lines.
During the manufacturing process it is common to perform various techniques in an attempt to maintain a more planar topography. One technique known in the art is the deposition of phosphorous or boron doped reflow glass. The reflow glass tends to cover the hills and fill in the valleys on the surface of the device, resulting in a more planar surface. This technique however, requires a high temperature treatment in order for the glass to flow and stabilize. The high temperature treatment can be undesirable when the manufacturing process also requires silicidation of a refractory metal. Typically, refractory metals silicided can not sustain high temperatures.
Another problem encountered when forming contact vias is the creation of sharp corners in the sidewalls of the opening. Those skilled in the art will recognize that it is difficult to get overlying layers to adequately cover the sharp corners. For example, when aluminum is deposited over a via with sharp corners, the layer is thinner at the sharp corners. This thinning of the layer can also cause electromigration problems and related device failure mechanisms.
Various techniques are used to alleviate the formation of sharp corners in vias. In one technique the contact via is formed by first performing an isotropic etch through a portion of a layer, followed by an anisotropic etch to complete formation of the opening. As those skilled in the art know, the resulting contact profile is not always free from sharp corners. Sharp corners can be formed at the top edges of the portions of the opening that are formed by the isotropic etch and the anisotropic etch.
Therefore, it would be desirable to provide a method for forming contact vias which are free from sharp corners and also result in a planarized topography. It is also desirable that such a method can be performed at low to medium temperatures. Finally, it is desirable that such a method not significantly increase the complexity of the manufacturing process.